# Copyright cocotb contributors
# Licensed under the Revised BSD License, see LICENSE for details.
# SPDX-License-Identifier: BSD-3-Clause
TOPLEVEL_LANG ?= verilog
SIM ?= verilator
MODULE := test_3316_a
VERILOG_SOURCES := ../test_3316/test_3316.sv
TOPLEVEL := test_3316

ifneq ($(shell echo $(TOPLEVEL_LANG) | tr A-Z a-z),verilog)
all:
	@echo "Skipping test since only Verilog is supported"
else ifeq ($(filter verilator,$(shell echo $(SIM) | tr A-Z a-z)),)
all:
	@echo "Skipping test since only Verilator is supported"
else ifeq ($(filter $(EXTRA_ARGS),--no-timing --timing),)
all:
	@echo "Skipping test since Verilator requires --timing or --no-timing option."
else
include $(shell cocotb-config --makefiles)/Makefile.sim
endif
